本文试图总结中断及其虚拟化相关知识点,会持续更新。

1. Terms

  • PIC
  • LAPIC
  • IOAPIC
  • MSI/MSI-x

  • APICv
  • VT-x Posted Interrupt
  • VT-d Interrupt Remapping
  • VT-d Posted Interrupt
  • IPIv

  • User Interrupt

2. Keypoint

2.1 host

四步曲:

2.2 APICv

五步曲:

3. Normal Interrupt in host

3.1 Interrupt Routing

  • IPI
    • source CPU writes ICR register
  • External interrupt
    • IOAPIC
    • MSI/MSI-x

3.2 Interrupt Acceptance

  • Set the IRR reg, add the interrupt to the waiting queue

3.3 Interrupt Recognition

  • Acquire the highest priority interrupt from the IRR reg , and set the corresponding bit in the ISR reg

3.4 Interrupt Delivery

  • Distribute the interrupt to the CPU to execute the interrupt handler registered in the IDT

4. Hardware optimization for interrupt virtualization

4.1 Interrupt Routing

  • IPIv

4.2 Interrupt Acceptance

  • Posted Interrupt

4.3 Interrupt Recognition

  • APICv:APIC-register virtualization

4.4 Interrupt Delivery

  • APICv:Virtual-interrupt delivery