When a base address register is marked as Prefetchable, it means that:the region does not have read side effects (reading from that memory range doesn’t change any state), and it is allowed for the CPU to cache loads from that memory region and read it in bursts (typically cache line sized).

本文将mark下RDMA Direct WQE与Inline data机制，主要内容转载自知乎:RDMA 高级。

本文将mark下NVF(Network Function Virtualization)相关notes。

本文将mark下RDMA ODP(On-Demand-Paging) feature相关notes。

本文将mark下RDMA Device Memory相关notes。

本文将mark下RDMA SRQ(Shared Receive Queue)/XRC(eXtended Reliable Connection)/DCT(Dynamically Connected Transport)技术相关notes。

本文将mark下Intel架构下TLB shutdown使用pause指令的相关notes。

本文将mark下RDMA UMR(User-Mode Memory Registration)机制相关notes。

本文将mark下ARM VHE(Virtualization Host Extensions)mode相关notes。

本文将mark下RDMA中的Event Queue机制。