Notes about AMD IOMMU IRTCache机制
本文将mark下AMD IOMMU IRTCache机制的相关notes。
Notes about PCIe flow control机制
本文将mark下PCIe flow control机制的相关notes。
Notes about PCIe prefetchable bar
When a base address register is marked as Prefetchable, it means that:the region does not have read side effects (reading from that memory range doesn’t change any state), and it is allowed for the CPU to cache loads from that memory region and read it in bursts (typically cache line sized).
Notes about RDMA Direct WQE与Inline data机制
本文将mark下RDMA Direct WQE与Inline data机制,主要内容转载自知乎:RDMA 高级。
Notes about NVF
本文将mark下NVF(Network Function Virtualization)相关notes。
Notes about RDMA ODP feature
本文将mark下RDMA ODP(On-Demand-Paging) feature相关notes。
Notes about RDMA Device Memory
本文将mark下RDMA Device Memory相关notes。
Notes about RDMA SRQ/XRC/DCT技术
本文将mark下RDMA SRQ(Shared Receive Queue)/XRC(eXtended Reliable Connection)/DCT(Dynamically Connected Transport)技术相关notes。
Intel架构下TLB shutdown使用pause指令
本文将mark下Intel架构下TLB shutdown使用pause指令的相关notes。