本文将mark下Intel Flat Memory Mode (FMM) 的相关notes。

Backgrpund

Overview

This design fully utilizes the capacity of both local DRAM and CXL memory by placing data exclusively at either of them, but not both. For example, once a cacheline is moved to local DRAM, it will no longer occupy any space in CXL memory.

The associativity between physical memory and local memory is direct-mapped, which means each line in the physical memory address space can only be cached at one location in local memory.

Details

参考Managing Memory Tiers with CXL in Virtualized Environments中的3.1 即可。

参考资料:

  1. The Advantages of Managing the CXL Memory Tier in Hardware
  2. Managing Memory Tiers with CXL in Virtualized Environments(OSDI’24)
  3. deepseek会话