本文将mark下Root Complex(RC)相关笔记。
The Root Complex is an entity that includes a Host Bridge and one or more root ports.
当CPU读写pcie设备的MMIO BAR时，RC的Host Bridge将processor transactions转换为TLP。因此当host bridge发现CPU访问的物理地址区间是MMIO时，会让目标EP(End Point)所属的root port发送memory read/write TLP，经过路由，最终TLP会下发到目标EP。
参考资料:
- Down to the TLP: How PCI express devices talk
- Introduction to PCIe
- 使用Xilinx IP核进行PCIE开发学习笔记